RD12 system context showing a protected 48 volt vehicle backbone, one zonal-controller power boundary, local 48 volt branches, a retained 12 volt domain and central-compute control links.
RD12-V01 Β· Application architecture only. Vehicle-event behavior, branch ratings, communications and safety allocation remain open.

01

Application problem

A 48 V vehicle backbone can reduce distribution current for higher-power loads, but a zone controller must also retain 12 V legacy loads and local low-voltage rails. RD12 defines who owns direct 48 V branches, 48 V-to-12 V conversion, downstream auxiliary rails, protection, faults and power states before selecting a controller. The page therefore begins with the vehicle-zone problem rather than LM5137-Q1.

L1 application
48 V automotive zonal power architecture
Local 48 V loads
Direct protected branches; exact load classes deferred
Retained 12 V loads
12 V / 20 A / 240 W project target
Local auxiliary rails
5 V and 3.3 V interfaces; implementation deferred

02

System requirements

The continuous protected-input target is 36–60 V around a nominal 48 V backbone. The selected 12 V domain is unidirectional in RD12, with separate enable and protection ownership. Transient, reverse-energy, thermal, EMI and functional-safety requirements remain explicit open inputs rather than inferred capabilities.

RD12 locked application requirements and ownership
RequirementLocked valueEvidence classBoundary
Protected input36–60 V continuous; 48 V nominalPROJECT_DESIGN_TARGETOEM event profile deferred
12 V domain12.0 V nominal Β· 20 A Β· 240 WPROJECT_DESIGN_TARGETNot measured
Conversion direction48 V to 12 V onlyARCHITECTURE_DECISIONReverse power deferred
Switching target400 kHz per phasePROJECT_DESIGN_TARGETTolerance and synchronization open
Efficiency objectiveAt least 94% at nominal inputPROJECT_DESIGN_TARGETMust be evaluated on hardware
Fault containmentIndependent protected branches by design intentPROJECT_REQUIREMENT_UNVALIDATEDNo fail-operational claim

03

Architecture alternatives

Four Stage A candidates were compared using application fit, portfolio gap, architecture depth, cross-vendor value, evidence, calculation tractability, visual clarity and PowerICDB relationship value, with overlap, complexity and claim-risk penalties. Rejected paths remain visible and are not described as equivalent replacements.

Four architecture candidates β€” one selected, three rejected
CandidateArchitectureScoreTrade-offDecision
ADual-domain 48 V zonal controller architecture29Best system ownership and portfolio-depth fit; wider validation scopeSELECTED
B48 V-to-12 V zonal converter decision25More tractable conversion focus; weaker whole-zone ownershipREJECTED
C48 V zonal distribution and protection23Strong fault/harness story; conversion and auxiliary domains incompleteREJECTED
DZone-controller local auxiliary power tree22Lower implementation burden; duplicates existing converter depthREJECTED

04

Why the selected architecture

Candidate A connects the 48 V backbone, local 48 V loads, the retained 12 V domain and future auxiliary rails in one reviewable ownership model. It also creates room for a vendor-neutral architecture decision while keeping the first implementation bounded to a unidirectional stage.

  • WHAT VENDOR REFERENCE DESIGNS ALREADY DO β€” TI demonstrates a 48 V backbone and 48 V-to-12 V interface; Infineon covers integrated multiphase buck and switched-tank ecosystems; ST covers ZCU smart distribution and control context.
  • WHAT HENGSHUN WILL NOT DUPLICATE β€” No vendor board, schematic, CAD, measured curve or block diagram is copied, and no vendor result is transferred to RD12.
  • WHAT HENGSHUN ADDS β€” A traceable requirement-to-architecture decision, three-vendor non-equivalence matrix, reproducible project calculations, maturity-aware BOM, PowerICDB relationship plan and explicit unexecuted validation contract.

05

Cross-vendor component decision

The architecture is vendor-neutral; the reference implementation is vendor-specific. Each alternative below occupies a reviewed functional class, but differences in integration, control, diagnostics, voltage, protection and software prevent drop-in-equivalence claims. These cross-vendor options are non-equivalent architecture alternatives, not replacement or equivalence claims.

Stage A cross-vendor matrix β€” seven device classes and three vendors
Functional blockDevice classTIInfineonSTDecision / non-equivalence
48 V backbone protectionExternal-FET smart high-side controllerTPS1212-Q1EiceDRIVER APD + OptiMOS 7 classVNF1048FTI primary; control and diagnostics differ
48 V-to-12 V controlMultiphase synchronous buck controlLM5137-Q1AURIX-controlled buck/STCStellar-controlled ecosystemTI primary; MCU paths add firmware and safety scope
Local low-power preregulationIntegrated preregulatorLM68645-Q1TLS5112C0EPVST 48 V-to-12 V portfolioContext only; not the 240 W stage
Power switches80–100 V automotive MOSFETExact FET deferredOptiMOS 7 classSTripFET F8 classCross-vendor screen; no selected equivalence
Protected branch switchSmart high-side switchTPS482H85-Q1PROFET/SPOC classVNF9Q20F/STi2Fuse classRatings and protection curves differ
Zone controlAutomotive MCUExternal system MCUAURIX familyStellar P/G familyOutside primary power stage
Current measurementBidirectional current-sense amplifierINA241A-Q1Automotive current-sense familyAutomotive current-sense familyExact common-mode and accuracy review required

06

Selected reference implementation

The selected implementation uses LM5137QRHARQ1 as a dual-channel controller configured for one two-phase interleaved synchronous buck. A separately protected 36–60 V node feeds the stage; two provisional 8.2 Β΅H phase inductors supply the 12 V / 20 A target. TPS1212-Q1 represents the high-side protection-controller concept. This functional reference is not a pin-complete schematic or production netlist.

Architecture
Vendor-neutral dual-domain zone power
Reference implementation
TI-specific LM5137-Q1 dual-phase buck
Selected orderable
LM5137QRHARQ1
Protection concept
TPS1212-Q1 with external FETs
Bidirectionality
DEFERRED Β· not required by RD12

07

Engineering calculations

All seventeen rows are Hengshun first-order calculations copied from the Stage A lock. They use project targets and screening assumptions; none is a simulation, waveform or measured result.

RD12 Stage A calculation bundle β€” 17 reproducible results
IDCalculationEquation and inputsResultProvenance / limit
C01Output powerPout = 12 V Γ— 20 A240 WHENGSHUN_CALCULATION Β· target
C02Ideal nominal input currentIin = 240 W / 48 V5 ALoss excluded
C03Input current at objectiveIin = 240 / (48 Γ— 0.94)5.319 A94% is a target
C04Loss budgetPloss = 240 Γ— (1 / 0.94 βˆ’ 1)15.319 WLumped screen
C05Nominal dutyD = 12 / 480.25 ratioIdeal
C06Low-line dutyD = 12 / 360.3333 ratioIdeal
C07High-line dutyD = 12 / 600.20 ratioIdeal
C08Per-phase average currentIphase = 20 / 210 AEqual sharing assumed
C09Nominal inductanceL = (48βˆ’12) Γ— 0.25 / (3 Γ— 400 kHz)7.5 Β΅H3 A ripple target
C10High-line inductanceL = (60βˆ’12) Γ— 0.20 / (3 Γ— 400 kHz)8.0 Β΅HIdeal endpoint
C11Per-phase peak currentIpk = 10 + 3 / 211.5 ATransient overshoot excluded
C12High-side RMS currentIhs = 10 Γ— sqrt(0.25)5.0 ARipple excluded
C13Low-side RMS currentIls = 10 Γ— sqrt(0.75)8.660 ADead time excluded
C14High-side conduction exampleP = 5Β² Γ— 0.0050.125 W per device5 mΞ© screening assumption
C15Low-side conduction exampleP = 8.660Β² Γ— 0.0050.375 W per deviceTemperature dependence excluded
C16Load-step capacitanceC = 10 A Γ— 100 Β΅s / 0.5 V0.002 FESR, ESL and loop response excluded
C17Equal-power current ratioI48 / I12 = 12 / 480.25 ratioConverter loss excluded

08

Protection and fault ownership

Vehicle-level events terminate at an upstream protected 48 V node whose TVS, reverse-energy path, disconnect FETs, fuse and connector are deferred. TPS1212-Q1 controls an external-FET high-side concept and exposes monitoring and protection functions, but exact thresholds, I2t, SOA, retry and latch policy require the final branch matrix. The converter owns regulated-stage current limiting; it does not close the vehicle safety case.

Unvalidated fault boundary

  • Independent-branch fault containment is a project requirement, not a demonstrated fail-operational result.
  • No short-circuit, overload, reverse-energy, transient-survival or diagnostic-coverage test has been executed.
  • Functional-safety goals and ASIL allocation remain with the system safety process.

09

Power-state, always-on and switched-domain behavior

The backbone protection controller, the 48 V branch switches and the 48 V-to-12 V converter require separate control ownership. The selected design intends an independently controllable 12 V domain, switched 48 V branches and a future low-power wake path. Wake source, MCU rail, standby budget, sequencing, 12 V battery coexistence and safe-state behavior remain deferred and must not be inferred from individual IC low-power modes.

Always-on ownership
DEFERRED to system wake and safety contract
12 V converter enable
Separately controllable architecture requirement
48 V branches
Individually switched/monitored by design intent
Measured standby current
NOT COLLECTED

10

Critical BOM maturity

The Stage A split is preserved exactly: two selected rows, seven provisional rows and four deferred rows. Selected fixes the controller identities only; it does not release the complete converter, protection system or supply chain.

RD12 critical BOM β€” 13 rows: 2 selected, 7 provisional, 4 deferred
IDFunctionCandidateStatusNext evidence gate
B01Multiphase buck controllerLM5137QRHARQ1SELECTEDExact controller networks and loop design
B0248 V high-side protection controllerTPS1212-Q1SELECTEDExact orderable and event/SOA coordination
B03Phase inductors8.2 Β΅H shielded automotive partsPROVISIONALAEC-Q200, saturation, loss, DCR and thermal
B04High-side MOSFETs80 V or 100 V automotive N-channelPROVISIONALRDS(on), Qg, SOA, avalanche and thermal
B05Low-side MOSFETs80 V automotive N-channelPROVISIONALLoss and thermal optimization
B06Current-sense elementLow-ohm automotive shuntPROVISIONALPulse power, tolerance and Kelvin layout
B07Input capacitor bank63 V-or-higher polymer plus ceramicPROVISIONALDerating, ripple, impedance and event coordination
B08Output capacitor bank12 V-domain polymer plus ceramicPROVISIONALESR, ESL, transient response and loop stability
B09Gate-drive supportController bias and bootstrap networkPROVISIONALDatasheet/EVM network review
B10EMI input filterDifferential/common-mode networkDEFERREDHarness, LISN, class and damping study
B1148 V branch switchesExact smart-switch matrix TBDDEFERREDLoad classes and protection curves
B12Zone-control MCUAURIX, Stellar or system MCUDEFERREDSafety, software and diagnostics ownership
B13Event clamp/reverse-energy pathVehicle-rated network TBDDEFERREDOEM pulse set, energy and SOA closure

11

Validation plan

The Stage A plan contains fifteen future bench items and zero executed items. Every line is work to be performed later under approved fixtures and acceptance criteria; none is a pass result or evidence of measured performance.

  • PLANNED_NOT_EXECUTED β€” BP01 Pre-power inspection: verify polarity, assembly identity, resistance and continuity before energization.
  • PLANNED_NOT_EXECUTED β€” BP02 Current-limited bring-up: observe the 12 V rail, input current, enable, startup and PGOOD from a programmable 36–60 V source.
  • PLANNED_NOT_EXECUTED β€” BP03 Input sweep: exercise 36–60 V at representative 10%, 50% and 100% loads; the final 12 V tolerance remains to be locked.
  • PLANNED_NOT_EXECUTED β€” BP04 Load sweep: exercise 0–20 A at 36 V, 48 V and 60 V while observing regulation, phase current and protection state.
  • PLANNED_NOT_EXECUTED β€” BP05 Phase-current balance: capture average, peak and RMS current in both phases across the operating matrix.
  • PLANNED_NOT_EXECUTED β€” BP06 Load transient: apply defined 5–15 A and 10–20 A steps; the 0.5 V deviation is an initial screen, not an acceptance result.
  • PLANNED_NOT_EXECUTED β€” BP07 Line transient: apply bounded 36 V, 48 V and 60 V transitions and observe regulation and false-trip behavior.
  • PLANNED_NOT_EXECUTED β€” BP08 Efficiency map: use calibrated source and load instrumentation to evaluate, rather than assume, the 94% objective.
  • PLANNED_NOT_EXECUTED β€” BP09 Thermal characterization: measure controller, MOSFET, inductor, capacitor and connector temperatures after the mechanical boundary is locked.
  • PLANNED_NOT_EXECUTED β€” BP10 Short-circuit and overload: execute only under an approved safety procedure after component SOA closure.
  • PLANNED_NOT_EXECUTED β€” BP11 48 V branch isolation: inject a representative branch fault and observe unrelated protected branches and diagnostics.
  • PLANNED_NOT_EXECUTED β€” BP12 Standby and wake: measure shutdown, standby, wake timing and inrush for defined control states.
  • PLANNED_NOT_EXECUTED β€” BP13 Output ripple: measure with a declared bandwidth and low-inductance probe fixture.
  • PLANNED_NOT_EXECUTED β€” BP14 Conducted EMI pre-scan: engineering discovery only after the LISN, harness and program class are defined.
  • PLANNED_NOT_EXECUTED β€” BP15 Protected-node event testing: execute only after the OEM pulse set, clamp network and SOA review are approved.

12

Evidence maturity and claim limits

RD12 keeps six product-model layers visible: application requirement, architecture decision, cross-vendor decision, selected implementation, evidence/validation maturity and PowerICDB relationship. Official sources establish vendor facts or application context; targets and calculations remain Hengshun work; validation remains unexecuted.

Evidence vocabulary used by RD12
LabelMeaningRD12 use
OFFICIAL_DEVICE_FACTVendor-published device identity or capabilityAttributed; not a system result
OFFICIAL_APPLICATION_CONTEXTVendor application or reference contextNo board or result transfer
PROJECT_DESIGN_TARGETHengshun requirement awaiting validation36–60 V, 12 V / 20 A, 94% objective
HENGSHUN_CALCULATIONReproducible first-order calculationSeventeen rows; not measured
SELECTEDIdentity locked for the candidateTwo controller rows
PROVISIONALStarting point requiring evidenceSeven BOM rows
DEFERREDBlocked on later system inputFour BOM rows
PLANNED_NOT_EXECUTEDFuture validation workFifteen items; zero executed
VENDOR_MEASURED_CONTEXTVendor result under vendor conditionsNot represented as Hengshun evidence

13

Official sources

Fourteen Stage A sources from Texas Instruments, Infineon and STMicroelectronics form the factual boundary. Product pages govern device facts; application and reference pages provide vendor context only. No nonofficial source is used for a primary claim.

14

Related Hengshun engineering pages

Use the existing wide-input converter, always-on rail, automotive buck, protection solution and technical guides to move from system architecture into narrower implementation questions. Request a Design carries the unresolved load, event, thermal, EMI and power-state requirements into an engineering discussion.

15

PowerICDB component links where available

The Stage A relationship plan has ten entries. No matching reviewed LM5137-Q1 or TPS1212-Q1 Product Detail is currently asserted, so device relationships remain explicit planned or discovery states rather than invented links. Existing Hengshun solution, application, reference-design, guide and Request a Design links use the current relationship system.

PowerICDB and public relationship plan β€” ten entries
IDBlockTargetStatusRule
R01Primary converterLM5137-Q1 Product DetailPLANNED_NO_LINKUse exact reviewed record only if available
R02Backbone protectionTPS1212-Q1 Product DetailPLANNED_NO_LINKDo not imply complete branch qualification
R0348 V smart branchTPS482H85-Q1DISCOVERY_ONLYContext alternative, not BOM substitute
R04Current measurementINA241A-Q1DISCOVERY_ONLYExact common-mode review required
R05Local preregulationTLS5112C0EPVPLANNED_NO_LINKNot the 240 W converter
R06Power switches80 V automotive MOSFET familyDISCOVERY_ONLYNo automatic selection
R07Smart distributionSTi2Fuse familyDISCOVERY_ONLYTechnology context only
R08Zone controlAURIX and StellarDEFERREDOutside primary power stage
R09Reference designDC-DC converter solution familyRESOLVED_LINKApplication-first journey
R10ConversionRequest a DesignRESOLVED_LINKNon-sensitive requirements only
RD12 dual-domain power tree separating protected 48 volt branches from a calculated two-phase converter, retained 12 volt loads and deferred 5 volt and 3.3 volt auxiliary rails.
RD12-V02 Β· Functional power tree, not a schematic. The 12 V / 20 A value is a project target and no fault-containment behavior is validated.
RD12 comparison of four architecture candidates, selecting the dual-domain zonal controller while retaining three rejected paths and their explicit trade-offs.
RD12-V03 Β· Stage A decision record. Rejected paths remain visible and are not equivalent replacements.
RD12 functional LM5137QRHARQ1 two-phase interleaved buck block with TPS1212-Q1 high-side protection concept, provisional phase components and a 12 volt 20 amp project target.
RD12-V04 Β· Functional technical redraw only. It is not a pin-complete schematic, released PCB or measured implementation.
RD12 fault-ownership map separating upstream protected-node events, 48 volt branch protection, converter-device functions and retained 12 volt load responsibilities.
RD12-V05 Β· Ownership plan only. Zero short-circuit, transient or diagnostic-coverage tests have been executed.
RD12 cross-vendor matrix comparing Texas Instruments, Infineon and STMicroelectronics conversion, protection, branch and control paths as non-equivalent ecosystems.
RD12-V06 Β· Cross-vendor architecture context. Device families are not represented as drop-in replacements.
RD12 calculation waterfall from the 12 volt 20 amp requirement through 240 watts, input current, per-phase current and provisional magnetics stress.
RD12-V07 Β· Seventeen first-order Hengshun calculations are design screens, not measured results.
RD12 evidence map separating fourteen official sources, seventeen calculations, thirteen BOM rows and fifteen planned validation items with zero executed.
RD12-V08 Β· Evidence and maturity summary. The candidate is not production-ready and has no bench evidence.